Symposium on Computer Science and Engineering

Ho Chi Minh City, Vietnam, October 22 - October 23, 2021

Timezone: Vietnam Time (GMT/UTC+7)

The Technical Tentative Program can be download here.

Recorded Videos for all industrial workshop and tecnical sections: Link


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(Goolge Meet)

DAY 1 - Friday, October 22, 2021

Venue: Seminar room/A3-building & Online ( Google Meet & Webex )

13:00-13:30 Registration
13:30-13:45 Opening Ceremony - Dean of Faculty of Computer Science and Engineering (Google Meet Link )

Keynote Session 1. Chair: Le Trong Nhan ( Google Meet Link )

13:45-14:45 KEYNOTE 1: Prof. Dr. Diep N. Nguyen, University of Technology Sydney
"AI-empowered Edge Computing with Efficient and Secure Distributed Learning"
14:45-15:00 Coffee Break

Industrial Session : Digital Transformation - Practical Views. Chair: Thoai Nam (Webex Link)

15:00-15:10 Opening by the Chair
15:10-15:35 Mr. Phan Thanh Son
Director, Strategic Business, FPT Corporation; Chief Business Development Officer, FPT Information Systems
Digital transformation: Trends, Challenges/Opportunities and Practices
15:35-16:00 Dr. Quach Ngoc Long
Founder and CEO of WORKIT; Founder and CEO of EPACIFIC
Digitial Transformation in Business Administration – Practical Applications
16:00-16:25 Mr. Lai Duc Nhuan
Chairman, CEO of ATALINK; Chairman of LARION Computing; Co-founder of MEPERIA
Towards a Modern Supply Chain Management Platform: Seamless interactivity across the entire supply chain with standardized master data
16:25-16:50 Mr. Ho Thai Truong Giang
Co-founder of EyeQ Tech; Co-founder of INTELIN TECHNOLOGY CORP; Used to be Manager of IT and Operations Departments of ACB
Managing Enterprise’s Content in Digital Transformation
16:50-17:20 Panel Session by the speakers
17:20-17:30 Closing remarks by the Chair

DAY 2 - Saturday, October 23, 2021

Venue: Seminar room/A3-building & Online ( Google Meet: Link )

08:15-08:45 Registration

Keynote Session 2. Chair: Tran Ngoc Thinh

08:45-09:30 KEYNOTE 2: Prof. Dr. Koichiro Ishibashi, The University of Electro-Communications
"MCU Process Vital Sign Acquisition using Contactless Doppler Radar"

Section 1: System Architectures, Design, and Applications - Chair: Tran Ngoc Thinh

09:30-09:50 Koki Kumagai, Duc-Tho Mai, Guanghao Sun, and Koichiro Ishibashi
Infectious Disease Screening system using Medical Radar and Data Quality Assessment by Efficient Neural Network Hardware
09:50-10:20 Vo Tan Phat, and Hoang Trang
An efficient hardware implementation of Convolutional Neural Network in detect Breast Cancer Histopathology Image
10:20-10:30 Tri Nhut Do, Cong Lap Le, and Minh Son Nguyen
Real-time Face Detection and Human Tracking System on FPGA Cyclone-V
10:30-10:45 Coffee Break

Section 2: Applied Artificial Intelligence. Chair: Quan Thanh Tho

10:45-11:05 Huy Tran, Tien Vu Van, Hoang Nguyen Viet, Duy Tran Ngoc Bao, Thinh Tien Nguyen, and Thanh Van Le
An efficient approach to measure the difficulty degree of practical programming exercises based on student performances
11:05-11:25 Trang Hong Son, Tran Van Lang, and Nguyen Huynh-Tuong
Neighborhood search for solving personal scheduling problem in available time windows with split-min and deadline constraints
11:25-11:45 Lai Nguyen Ha My, Huynh Ngoc Thien, and Nguyen Duc Dung
Generating Website Code from Image

Section 3: Applied Artificial Intelligence. Chair: Nguyen Duc Dung

13:30-13:50 Thien Pham, Loi Truong, Mao Nguyen, Anh Bui, Akhil Garg, Liang Gao, and Tho Quan
A Multitask Data-Driven Model for Battery Remaining Useful Life Prediction
13:50-14:10 Thuan Nguyen Thi Hiep, Nhan To Thanh, and Tho Quan Thanh
Forcing-Seq2Seq Model and PNG-LM Model: Multiple automatic models of title generation for natural text using Deep Learning
14:10-14:30 Quang Duy Nguyen, Son Thanh Le, Ha Manh Tran, Sinh Van Nguyen
An Unbiased Pairwise Approach toward Learning-to-Rank
14:30-14:45 Coffee Break

Section 4: Network and Service Management. Chair: Tran Manh Ha

14:45-15:05 Long Tan Le and Tran Ngoc Thinh
Enhancing Security and Robustness for SDN-Enabled Cloud Networks
15:05-15:25 Xuan-Quang Nguyen and Cuong Pham-Quoc
An FPGA-based Convolution IP Core for Deep Neural Networks Acceleration
15:25-15:45 Ha Manh Tran, Tuan Anh Nguyen and Son Thanh Le
Two-Phase Defect Detection Using Clustering and Classification Methods